LIBRARYVoltage dividers.
How a voltage divider splits a voltage, why it sags under load, and how to scale a higher voltage into an ADC. With a live calculator.
A voltage divider is two resistors in series that split a voltage. The output, tapped between them, is a fixed fraction of the input set by the two resistor values.
Inputs
Result
3.33 V
output voltage (at the tap)
Add an ADC's input impedance in parallel with R2 if it's not much larger than R2.
Quiescent current through the divider
0.167 mA
Why it sags under load
The divider only holds its ratio while almost nothing draws current from the tap. Connect a real load and it pulls the output down, because the load acts like a third resistor. So a divider suits a high-impedance input that draws almost no current, and it is a poor way to power anything.
Scaling a voltage into an ADC
An ESP32-S3 analog input reads roughly 0 to 3100 mV with its highest attenuation, near the 3.3 V rail (Espressif ESP-IDF). To read a higher voltage, say a battery above the rail, a divider scales it down into that range so the ADC can measure it safely. The ADC pin draws almost no current, which is exactly the light load a divider needs.
▸Deep dive· Cleaning up the reading in firmware
Real resistors carry a tolerance and the ADC itself has an offset, so the raw number a divider hands the chip is close, not exact. Two cheap firmware habits close the gap. First, average: read the pin several times in a row and take the mean, and the random jitter shrinks. Second, calibrate: measure the known error once against a trusted meter, store it as a fixed offset, and subtract it from every future reading. The hardware sets the ballpark, and a few lines of firmware make it accurate. Espressif's ESP-IDF ships an ADC calibration API for exactly this.
Checkpoint
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One Thousand Drones engineering team · verified 2026-07
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